Industry: Semiconductor design & verification services. Sector: Pre‑silicon validation, SoC emulation and FPGA prototyping for high‑performance communications, storage and compute products.

This role is On‑Site in India and focused on hands‑on emulation lab engineering to accelerate bring‑up, validation and debug of complex RTL and system software stacks.

Primary title: Hardware Emulation Engineer

Role & Responsibilities
Develop and maintain emulation testbenches and regression suites to validate RTL and subsystem behaviour on hardware emulators and FPGA prototypes.
Map UVM testcases and verification flows to emulation platforms; optimise time‑to‑first‑failure and throughput for large regressions.
Perform deep debug and root‑cause analysis using waveform viewers, trace captures and emulation debug features; collaborate with RTL and firmware owners to resolve issues.
Configure, deploy and maintain emulation labs (platform image management, build automation, lab instrumentation and resource scheduling).
Create automation and orchestration scripts to streamline build, load,



run and log collection for emulation and prototyping cycles.
Drive performance tuning, platform migrations and best practices for emulation usage; document runbooks and mentor junior engineers.

Skills & Qualifications

Must‑Have
SystemVerilog
UVM
Mentor Veloce
Cadence Palladium
FPGA Prototyping
Python

Preferred
Synopsys ZeBu
Embedded C/C++
SoC bring‑up and board‑level debug

Qualifications
Bachelor's degree in Electronics, Electrical Engineering, Computer Engineering or equivalent practical experience.
Proven track record of hands‑on emulation or FPGA prototype validation in a commercial SoC or IP setting.
Solid lab discipline: test automation, image/version control and reproducible debug practices for onsite emulation facilities.

Advantages & Culture Highlights
Work in a focused, hardware‑centric emulation lab with access to industry‑grade platforms an

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