We are hiring for one of our reputed clients for the following position. If you're interested and your experience matches the requirement, we'd love to hear from you.
Position: Hardware Design Engineer
Experience: 5 - 7 Years
Location: Hyderabad
Contract tenure: 1 year
Top 3 skills:
- STA Engineers, Constraint writing of different timing modes,
- Static timing analysis of different modes
- Formality & LEC
- Valuable to have (secondary) skills:
- Timing CDC crossing understanding
- Conformal or Netlist based ECO implementation
- Strong communication skills and able to interact with different cross functional teams
- Education Background: B.Tech / M.Tech in Electronics, VLSI or related field
Job Description
We are looking for an experienced STA Engineers to join our team in Hyderabad. In this role,
you will learn and contribute to implementation activities like timing constraints, STA, logical equivalence check etc. You will get hands-on exposure to industry standard tools and methodologies while working alongside experienced engineers.
Job Responsibilities / Day-to-Day Activities
- Should be able to develop constraints for different timing modes like Functional, Scan shift etc
- Able to do static timing checks like check timing, update timing and able debug issues in this
- Should be able to debug Formality/Conformal logical equivalence check (LEC)
Qualifications & Experiences:
- B.E/B.Tech/M.Tech in Electronics, VLSI or related field.
- Strong understanding of digital logic design and timing constraints & STA.
- Understanding of Verilog
- Familiartiy with EDA tools and scripting