Hyderabad, Telangana
Job Summary

Own real-time firmware for MCU-class cores and safety/real-time islands within ARM-based SoC platforms and standalone microcontrollers — RTOS bring-up, deterministic control loops, low-power operation and safety-oriented software practices.

Key Responsibilities
Develop and maintain firmware on FreeRTOS, Zephyr or bare-metal for Cortex-M class cores and real-time islands in heterogeneous SoCs.
Bring up MCU platforms — clock trees, low-level peripheral drivers, boot flow, memory maps and linker configuration.
Implement deterministic, hard real-time control paths with measured interrupt latency and jitter budgets.
Build inter-processor communication between the real-time domain and the application-processor domain (RPMsg/virtio, mailboxes, shared memory).
Implement aggressive low-power design — sleep states, wake sources, duty cycling and power-state machines for micro-power operation.
Support hypervisor-partitioned real-time guests and mixed-criticality configurations where applicable.
Apply safety-oriented development practices — coding standards, traceability, defensive design and diagnostics for SIL-oriented products.
Debug with JTAG/SWD, trace, logic analysers and hardware-in-the-loop rigs; drive firmware release and configuration management.
Skill Requirements




8–10 years in embedded firmware development, majority on RTOS or bare-metal systems.
Expert C on ARM Cortex-M (and ideally Cortex-R/A real-time cores); assembly-level debugging comfort.
Production experience with FreeRTOS and/or Zephyr — scheduling, synchronization primitives, memory constraints, device model.
Peripheral-level driver work: SPI, I2C, UART, ADC, PWM, timers, DMA, GPIO.
Real-time analysis — interrupt latency, priority inversion, WCET awareness, jitter measurement.
Low-power firmware design and current-consumption measurement.
Hardware debug tooling: JTAG/SWD, oscilloscope, logic analyser, schematic reading.
Other Requirements
Functional safety exposure — IEC 61508 SIL, ISO 26262 ASIL, MISRA C, static analysis and safety documentation.
Inter-processor communication frameworks (OpenAMP, RPMsg) and remoteproc.
Hypervisor-based mixed-criticality partitioning (Xen or equivalent).
Wireless MCU firmware — Wi-Fi, BLE or 802.15.4/Thread/Matter on constrained devices.
Secure firmware update on constrained MCUs (MCUboot).
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📌 Senior Technical Architect (Hyderabad)
🏢 HCLTech
📍 Hyderabad