SEMICONDUCTOR : ANALOG LAYOUT DESIGN ENGINEER, 4nm (India)

SEMICONDUCTOR : ANALOG LAYOUT DESIGN ENGINEER, 4nm (India)

19 Aug
|
Vhunt4U
|
India

19 Aug

Vhunt4U

India

Desired Profile :
- Bachelors / Masters degree in engineering from EEE / EC with expertise in mixed-signal or analog layout design
- Expertise with Samsung 4nm technology node is mandatory
- Expertise in analog floor planning and layout for complex modules such as SerDes, ADC / DAC, PLLs similar high-speed or precision circuits.
- Expertise in supporting top-level integration of multiple analog and mixed-signal blocks within larger SoCs.
- Expertise in resolving complex DRC, LVS, antenna verification issues
- Expertise in advanced deep sub-micron and FinFET process technologies, incorporating fabrication, EM, ESD, latch-up, and reliability considerations into layouts
- Preferred immediate hires

Disclaimer: This job posting & Location has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 SEMICONDUCTOR : ANALOG LAYOUT DESIGN ENGINEER, 4nm (India)
🏢 Vhunt4U
📍 India

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