Role Description
Client Job Title: RTL practice head
UST Job Title: Architect II - VLSI
Who We Are
At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in over 25 countries, we build for boundless impact—touching billions of lives in the process. Visit us at .
The Opportunity
UST is looking for an experienced RTL Delivery Manager to lead end-to-end delivery of RTL Design projects for complex SoCs and IPs. The ideal candidate will have strong technical expertise in RTL Design, proven team and delivery leadership, customer management experience, and a track record of successfully executing semiconductor/VLSI programs for global customers.
Key Roles & Responsibilities
- Lead end-to-end delivery of RTL Design projects, ensuring quality, schedule, and budget adherence.
- Manage multiple RTL Design programs across SoC, IP, and subsystem development.
- Lead, mentor, and develop RTL Design Engineers, Technical Leads, and Project Leads.
- Collaborate with customers to understand requirements, define project scope, and establish execution plans.
- Track project milestones, identify risks, and implement effective mitigation plans.
- Ensure adherence to RTL coding guidelines, design methodologies, and quality processes.
- Coordinate with Verification, DFT, Physical Design, Architecture, Firmware, and Program Management teams.
- Drive resource planning, utilization, delivery excellence, and continuous improvement.
- Review RTL architecture, design specifications, code quality, and design documentation.
- Support pre-sales activities, effort estimation, proposal preparation, and technical solution discussions.
- Manage customer communication, project status reviews, escalations, and issue resolution.
- Drive process optimization, technical innovation, and delivery best practices.
- Lead geographically distributed engineering teams across multiple locations.
Required Skills
- Strong expertise in RTL Design using Verilog/SystemVerilog.
- Proven experience in SoC/IP development for ASIC or FPGA.
- Strong understanding of digital design concepts, microarchitecture, and RTL implementation.
- Knowledge of Synthesis, STA/Timing Analysis, CDC, Lint, and low-power design methodologies.
- Good understanding of AMBA protocols – AXI, AHB, APB and industry-standard interfaces.
- Experience with EDA tools from Synopsys, Cadence, or Siemens EDA.
- Strong project and delivery management capabilities.
- Excellent customer-facing, communication, and stakeholder management skills.
- Experience in resource planning, effort estimation, risk management, and project execution.
Desired Skills
- Experience managing large and geographically distributed RTL engineering teams.
- Experience working with global semiconductor customers.
- Exposure to complete SoC development lifecycle and cross-functional collaboration with Architecture, Verification, DFT, Physical Design, and Firmware teams.
- Experience supporting pre-sales, solutioning, proposals, and customer engagements.
- Solid focus on delivery excellence, process improvement, and technical innovation.
Qualification
- Bachelor's or Master's degree in Electronics/Electrical Engineering, VLSI, Microelectronics, or a related field.
- 12–18+ years of relevant experience in RTL Design, SoC/IP development, and engineering/delivery management.
- Experience in the Semiconductor/VLSI domain is preferred.
- Location: Bangalore / Hyderabad / Pune, as applicable.
What We Believe We’re proud to embrace the same values that have shaped UST since the beginning. Since day one, we’ve been building enduring relationships and a culture of integrity. And today, it's those same values that are inspiring us to encourage innovation from everyone, to champion diversity and inclusion and to place people at the centre of everything we do.
Humility We will listen, learn, be empathetic and help selflessly in our interactions with everyone.
Humanity Through business, we will better the lives of those less fortunate than ourselves.
Integrity We honour our commitments and act with responsibility in all our relationships.
Equal Employment Opportunity Statement UST is an Equal Opportunity Employer. We believe that no one should be discriminated against because of their differences, such as age, disability, ethnicity, gender, gender identity and expression, religion, or sexual orientation. All employment decisions shall be made without regard to age, race, creed, colour, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law. UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance.
- To support and promote the values of UST.
- Comply with all Company policies and procedures
Skills RTL Design, SoC, SystemVerilog, Microarchitecture
📌 Architect II - VLSI (Bengaluru)
🏢 UST
📍 Bengaluru