BootROM Security Lead RISC-V MPU Platform

BootROM Security Lead

Build the secure boot and Root of Trust foundation for a next-gen RISC-V MPU platform.

About the Role

We re building a next-generation, application-class RISC-V MPU SoC platform for Linux systems - bringing together multimedia, industrial connectivity, security, and heterogeneous compute subsystems.

In the Platform Software team, you ll own key pieces of secure boot and Root of Trust enablement, partner closely with architecture and hardware teams, and help shape SoC security decisions with hands-on data from pre-silicon, FPGA, and first-silicon debug.

Key Responsibilities

- Secure boot RoT development: design, implement, and maintain a production-quality secure boot and Root of Trust stack for a 64-bit RISC-V MPU platform.
- Enable and harden the boot and firmware stack (boot flow, early platform initialization, BootROM/FSBL, U-Boot, OpenSBI/firmware handoff as applicable).
- Drive OS-level enablement for security: kernel/BSP integration, Device Tree updates, reserved memory regions, firmware interfaces, and secure/non-secure boundary definitions.
- Develop and debug platform security components and drivers (crypto accelerators, key services, secure storage, lifecycle/provisioning flows, anti-rollback, and attestation hooks as applicable).
- Deliver security collateral as part of SDK releases: integration, validation, and developer-facing documentation (bring-up/debug notes, known issues, and release readiness).
- Pre- post-silicon validation (AVV): create tests, validate on FPGA/first silicon, and root-cause issues across HW/FW/kernel (boot, crypto, isolation, and lifecycle).

Required Qualifications

- B.E./B.Tech or M.E./M.Tech in Computer Engineering,



Electrical/Electronics Engineering, or a related field.
- Strong experience (typically 5+ years) in low-level firmware/boot software, secure boot, and Root of Trust development on SoCs.
- Expert-level C programming; comfortable reading low-level firmware and kernel-adjacent code.
- Robust Linux internals knowledge: boot flow, memory management/MMU basics, privilege/isolation concepts, and system-level debugging.
- Hands-on SoC/platform bring-up experience and ownership mindset for security and boot-stack quality.
- Hands-on with U-Boot, Linux kernel, Device Tree, and Yocto/OpenEmbedded (or equivalent build systems).
- Strong debugging skills with GDB and at least one of OpenOCD/JTAG, Lauterbach, or similar tools.
- Experience working on FPGA, emulation, or early-silicon platforms for bring-up/validation.

Good to Have

- RISC-V (RV64) security experience or strong exposure to other application-class CPU security architectures (ARM TrustZone/EL3, etc.).
- Background in pre-silicon/FPGA validation or post-silicon debug and triage for boot/security issues.
- Familiarity with platform security building blocks: secure boot, lifecycle/provisioning, secure storage, anti-rollback, attestation, and firmware/OS boundaries.
- Experience with OpenSBI, secure monitor/firmware layers, and early-boot isolation (PMP/sPMP/IOPMP or equivalents).
- Exposure to CI/CD and automated validation (test frameworks, dashboards, regressions) for boot/security quality.

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 BootROM & Security Lead - RISC-V MPU (Pune)
🏢 Globalfoundries
📍 Pune