Role Expectation
This is a full-time teaching and faculty role. The selected candidate will be responsible for classroom training, hands-on lab sessions, student mentoring, project guidance, assessments, and placement preparation.
Candidates with solid semiconductor industry experience who are passionate about teaching and mentoring students will be highly preferred.
About MOSart Labs
MOSart Labs is a leading Semiconductor Training & Chip Design company committed to building industry-ready VLSI engineers through hands-on, industry-focused training. We are looking for a passionate and experienced Design Verification Faculty to deliver high-quality corporate-level offline classroom training and mentor aspiring Design Verification Engineers.
Key Responsibilities
Deliver offline classroom training on Design Verification and Advanced Design Verification.
Conduct hands-on laboratory sessions using industry-standard EDA tools.
Develop course content, lab manuals, assignments, assessments,
and verification projects.
Mentor students on Design Verification projects, internships, and placement preparation.
Evaluate student performance and provide technical guidance.
Conduct practical coding, simulation, debugging, and verification sessions.
Guide students in developing industry-oriented SystemVerilog and UVM-based verification environments.
Stay updated with the latest semiconductor verification methodologies, technologies, protocols, and EDA tools.
Collaborate with internal technical teams to continuously enhance the Design Verification curriculum.
Required Technical Skills
Strong understanding of ASIC/IP/SoC Design Verification.
SystemVerilog Fundamentals
Testbench Development
Constrained Random Verification
Functional Coverage
Code Coverage
SystemVerilog Assertions (SVA)
Scoreboards & Drivers
Verification Planning and Flow
Debugging & Regression
UVM Methodology
Adv