Design Verification Engineer Vijayapura

Design Verification Engineer Vijayapura

20 Aug
|
ACL Digital
|
Vijayapura

20 Aug

ACL Digital

Vijayapura

Job description:

Experience: 4 - 8 Years

Location : Bangalore / Hyderabad

UVM, SV and Debugging Skills

· Solid understanding of design verification methodologies (UVM, SV, etc.) .

· Experience with industry-standard protocols (AXI or DDR or PCIe, etc.).

· Familiarity with ASIC and SoC design flows .

· Proficiency in scripting languages.

· Experience with simulation tools and debuggers .

· Robust problem-solving and analytical skills .

· Communication and collaboration skills to work effectively with cross-functional teams

📌 Design Verification Engineer Vijayapura
🏢 ACL Digital
📍 Vijayapura

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