About the Job Choosing Capgemini means choosing a place where youll be empowered to shape your career, supported by a collaborative global community, and inspired to reimagine whats possible. Join us for unlocking the value of technology and drive scalable, sustainable growth. Your Profile In this role, you will:Define and lead verification strategy for complex SoCs and subsystems, ensuring verification closure from specification through tapeout using scalable methodologies.
Define SoC/IP verification architecture and strategy.Establish verification plan and coverage model.Guide UVM-based verification environments.Lead subsystem and full-chip verification.Drive low-power, performance, emulation, and FPGA verification.Conduct verification reviews with customers.Support methodology standardization and automation.Must Have12+ years in verification.Led multiple SoC verification programs to tapeout. SoC level DV Experience is mustExpert in UVM, SystemVerilog,
Assertions.Experience in SoC boot verification using Boot Code.Strong coverage-driven verification expertise.Experience with ARM/RISC-V based compute Sub-Systems, Security Sub-system, NoC, Debug etcKnowledge of emulation based acceleration with Palladium, Zebu or VeloceFamiliarity with PCIe, DDR, Ethernet, UCIe or similar high-speed protocols.AI-assisted verification flows.Valuable to HaveFormal verification.Security verification.Functional Safety verification.Portable Stimulus (PSS).Hardware/software co-verificationHBM/HMC memory systems About Us At Capgemini Engineering, the world leader in engineering services, we bring together a global team of engineers, scientists, and architects to help the worlds mostinnovative companies unleash their potential. From autonomous cars to life-saving robots, our digital and software technology experts think outside the box as theyprovide unique RD and engineering services across all industries. Join us for a career full of opportunities. Where you can make a diffe