SOC Digital Design Architect

Location: Bengaluru

About the job

Roles and responsibility
- Responsibility for Micro architecture , Spec / MRD understanding
- Drive Micro architecture document including
- Top level Architecture and Block Diagram
- Clock/ Reset/ Power Management
- SoC Fabrics, Protocol Bridges
- Fuse, Boot, Security
- IP planning and interfaces
- Pinout, ball mapping
- Systems and Test planning
- Design feasibility and PPA analysis
- Develop details for micro architecture for the target SoC to meet chip specifications.
- Write MAS / PRD document, drive alignment for IPs with reviews to signoff.
- Develop and work with the team to deliver RTL, UPF, timing constraints.
- Work with SoC lead to integrate the design and setup the FPGA flows
- Review DV, DFT and PD implementation plans for sign-off.

Skills:
- Verilog, VHDL, High Speed SerDes protocols understanding, Bus protocols, Clock & power management etc.
- Proven track record of having Micro architected,



Designed a complex SoC to production
- RTL design process: Specifying microarchitecture, developing RTL, linting, UPF coding, delivering synthesizable RTL, guiding Verification, DFT and PD implementations of the design.
- Awareness in comprehensive validation techniques of the specific design domain.
- Ability to review and signoff implementation of the design.
- Hands-on experience working with version control systems.
- Work with the FW development team for the design – as required.
- Scripting experience for efficiency and quality.

Education & Experience:
- CS/ EE/ EC Engineering Graduate or postgraduate with 15+ years of relevant experience.

Skills

SoC

Fabrics

Security

PPA

Verilog

Systemverilog

Serdes

UPF

Contact:

Uday

Mulya Technologies

[email protected]

"Mining The Knowledge Community"

📌 SOC Digital Design Architect (Bangalore Metropolitan Area)
🏢 Mulya Technologies
📍 Bangalore Metropolitan Area