The Role

We are rebuilding the firmware for the digital modules at the heart of our imaging system — a large array of identical FPGA-based boards that capture, process and report data in lock-step.

The work is a clean-room implementation: you build the design from a written protocol specification, and you validate it against a working reference system. This is not a maintenance role and it is not code archaeology — you write the RTL, you write the testbench, and you prove on the bench that the numbers come out right.

The device has no processor subsystem and no operating system. Everything happens in fabric, with a small soft core for housekeeping. If you enjoy owning a design end to end — from the ADC pins through the DSP chain to the bus frame that leaves the board — this is that job.

What You Will Build

Bus

Serial multipoint bus slave: 72-bit frame, reply shifted by one clock, CRC at line rate. Shared return line across 16 modules, output enabled only when granted.

Capture

Parallel ADC capture, 14-bit at 20 MSPS, with the sampling window proven — not assumed.





Processing

CIC decimation with a programmable rate, windowing, single-bin DFT. Fixed point throughout, with word growth under control.

Control

SPI master driving four devices with different word lengths, clock dividers and chip selects.

Boot

Configuration from external flash: two images with fallback, plus firmware update over the bus to 192 modules with integrity checking.

Verification

Reference model in Python (NumPy) or MATLAB; the RTL must match it in both amplitude and phase.

Required Qualifications

4+ years of production FPGA development — shipped hardware, not evaluation boards.
Solid RTL design in Verilog, SystemVerilog or VHDL: finite state machines, synchronous design, parameterised modules, disciplined coding style.
Intel/Altera Quartus (Prime or II). Deep Xilinx/Vivado experience is welcome, but you must be willing and able to work in the Intel toolchain — and be able to show y

📌 FPGA Engineer — Module Firmware (Bengaluru)
🏢 EMTensor
📍 Bengaluru