? Hiring: Senior / Lead Physical Design Engineers

We are looking for Senior / Lead Physical Design Engineers to join our growing VLSI team in Bengaluru.

If you have strong expertise in Physical Design, PnR, CTS, STA, Timing Closure, and Signoff, this is an excellent opportunity to work on advanced-node SoC designs.

? Position
Senior Physical Design Engineer / Lead Physical Design Engineer

? Location
Bengaluru, Karnataka

? Education
B.E./B.Tech/M.E./M.Tech in Electronics & Communication Engineering (ECE), Electrical & Electronics Engineering (EEE), VLSI, Microelectronics, or a related field.

? Experience
5+ Years – Senior
8+ Years – Lead

? Key Responsibilities
End-to-end Physical Design implementation from Netlist to GDSII
Floorplanning, power planning, placement, CTS, routing, and optimization
Setup/Hold timing closure and STA analysis
Congestion, DRV, and QoR analysis and optimization
Clock tree synthesis and skew/latency optimization




Physical Design ECO implementation and timing closure
DRC/LVS and physical signoff activities
Debugging and resolving complex PnR and timing issues
Work closely with RTL, Synthesis, STA, DFT, and Signoff teams
Lead and mentor junior engineers for Lead-level positions
Drive blocks/subsystems toward signoff and tapeout

?️ Required Skills
Strong experience in Physical Design / PnR
Hands-on experience with Innovus / ICC2 / Fusion Compiler
Good knowledge of PrimeTime / Tempus
Strong understanding of STA, timing constraints, CTS, routing, and ECO
Experience with advanced technology nodes
Good understanding of DRC, LVS, EM/IR, SI and signoff
Solid debugging and problem-solving skills
TCL scripting and Linux/Unix knowledge

⏳ Notice Period
Immediate to 30 Days preferred

📌 Lead Physical Design Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru