Responsibilities will include, but are not limited to: Develop and maintain quality systems and metrics to monitor and improve scribe design and assembly processes. Build and maintain Technical Risk Assessment (TRA) documentation and communicate with assembly teams. Collaborate with global teams to support training and knowledge sharing. Apply deep understanding of semiconductor process Design , Layout & Verification flows and Tapeout process Design and verify test structures using tools like Cadence and Calibre. Ensure layout correctness through DRC and LVS checks and manage waiver approvals. Support audits and compliance with ISO 9001 and other relevant standards.