Description
Invent the future with us.
Ampere is a semiconductor design company for a recent era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute.
As a pioneer in the new frontier of energy efficient high-performance computing, Ampere is part of the Softbank Group of companies driving sustainable computing for AI, Cloud, and edge applications.
Join us at Ampere and work alongside a passionate and growing team - we’d love to have you apply
About the role:
As a vital member of the layout team, you will be responsible for delivering precise layouts that comply with LVS, DRC, ERC, EM, and IR standards. Your role will require close collaboration with cross-functional teams to ensure smooth full-chip integration and high-quality design execution. You should be self-motivated, capable of independently resolving critical issues, managing schedules, and leading others to successfully complete their tasks. Additionally,
you will mentor junior team members to enhance their skills and support their professional growth.
What you’ll achieve:
Collaborate with the Place & Route (P&R;) team to resolve full-chip integration issues.
Develop and improve methodologies to simplify custom macro integration into the P&R; flow.
Floorplan and build out cells, blocks, and macros efficiently.
Understand, create, and debug LEF files to support design processes.
Design complex layouts for both analog and digital circuits using deep submicron technologies.
Analyze and interpret LVS, DRC, ERC, EM, and IR results to identify and resolve issues.
Identify schematic or layout problems and work closely with engineering teams to address them.
Ability to work on multiple projects across different technologies simultaneously.
Learn and effectively utilize Ampere’s in-house design tools.
Coordinate with circuit engineers located in different regions and time zones.
Support and assist during tapeout phases to ensure succes
📌 Principal Layout Design (Pune)
🏢 Ampere
📍 Pune