22 Aug
|
Shashwath Solution
|
Noida
22 Aug
Shashwath Solution
Noida
The engineer should be well versed in Verilog/VHDL RTL coding, experienced in using Mentor DfT tools and Cadence tools.- The engineer needs to have hands-on experience in scan insertion, JTAG, ATPG DRC and coverage analysis, Simulation debug with timing/SDF.
- Candidate with LBIST and Mixed Signal Radar IC experience is highly desirable
- Must be proactive, collaborative and detail-oriented capable of exercising independent judgment
- The engineer with experience on debug and root cause the problem in simulation failures
- Self-motivation, flexibility, with robust interpersonal skills. Effective communication skills, oral and written skills.
📌 DFT Engineer (Noida)
🏢 Shashwath Solution
📍 Noida