Job DescriptionJob Description:
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- Derive sensor-based system level specifications and the circuit architecturen
- ASIC design and tapeoutn
- Coordinate with the fab (interact with chip Manufacturing lab team on the PDK (process design kit), ESD (for I/O's) and other technological aspects.n
- Mentor embedded system designer for the ASIC test board design, integration with the ASIC/sensor, circuit testing, set up the prototype characterization work benchn
- Field visit along with the engineers for the field testing, interact with the customers on the sensor-system requirementsn
- Preparation of technical reports (design, testing & validation, field experiments), experimental datasets, mentor engineers for project documentationn
- Conduct prior-art and patent search, identify novelty for advancing sensor design, contribute to publications and technology-transfer activitiesn

nMinimum Qualifications and Experience:
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- Ph.D. in Electrical Engineering or Electronics Engineering, with a thesis related to Integrated Circuit Design,



preferably in Analog/Mixed-Signal IC Design.n
- Prior experience in IC design and tape-out in an academic or industrial environment.n
- Robust publication record or demonstrated experience in IC design and chip testing, particularly in analog/mixed-signal circuits, is preferred.n

nRequired Skills:
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- Ability to interpret domain-specific sensing requirements and translate them into circuit specifications.n
- Strong knowledge of low-power and low-noise circuit design techniques.n
- Experience in sensor signal-conditioning IC design, calibration, and characterization.n
- Full ASIC design flow: System level design → Circuit level design → simulation → layout → pre-manufacturing and sign off → tapeout coordination with the fab (Analog & mixed-signal IC design), ASIC testing and running the experimentsn
- Hands-on experience with IC design flows using Cadence, Synopsys, or Siemens EDA toolsetsn

nLocation of wor

📌 Principal Engineer (Raigarh)
🏢 TIH | IIT Bombay
📍 Raigarh