23 Aug
|
TIH | IIT Bombay
|
Mumbai
23 Aug
TIH | IIT Bombay
Mumbai
Job Description Job Description:
n n Derive sensor-based system level specifications and the circuit architecture
n ASIC design and tapeout
n Coordinate with the fab (interact with chip Manufacturing lab team on the PDK (process design kit), ESD (for I/O's) and other technological aspects.
n Mentor embedded system designer for the ASIC test board design, integration with the ASIC/sensor, circuit testing, set up the prototype characterization work bench
n Field visit along with the engineers for the field testing, interact with the customers on the sensor-system requirements
n Preparation of technical reports (design, testing & validation, field experiments), experimental datasets, mentor engineers for project documentation
n Conduct prior-art and patent search, identify novelty for advancing sensor design, contribute to publications and technology-transfer activities
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n Minimum Qualifications and Experience:
n n Ph.D. in Electrical Engineering or Electronics Engineering, with a thesis related to Integrated Circuit Design, preferably in Analog/Mixed-Signal IC Design.
n Prior experience in IC design and tape-out in an academic or industrial environment.
n Strong publication record or demonstrated experience in IC design and chip testing, particularly in analog/mixed-signal circuits, is preferred.
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n Required Skills:
n n Ability to interpret domain-specific sensing requirements and translate them into circuit specifications.
n Robust knowledge of low-power and low-noise circuit design techniques.
n Experience in sensor signal-conditioning IC design, calibration, and characterization.
n Full ASIC design flow: System level design → Circuit level design → simulation → layout → pre-manufacturing and sign off → tapeout coordination with the fab (Analog & mixed-signal IC design), ASIC testing and running the experiments
n Hands-on experience with IC design flows using Cadence, Synopsys, or Siemens EDA toolsets
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n Location of work:
n n TIH-IoT, IIT Bombay Campus, Powai, Mumbai – 400076.
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📌 Principal Engineer - ASIC Design (Mumbai)
🏢 TIH | IIT Bombay
📍 Mumbai