Role & responsibilities

Experience in Package Level Signal integrity simulation and Power Integrity Analysis.

Must have knowledge ANSYS HFSS 3D and SI-wave for PI/SI/EMI simulations and validation, and provide design recommendations based on simulation results

Must done Signal Integrity (SI) analysis for high-speed and critical nets, including impedance control, reflection analysis, crosstalk (NEXT/FEXT), TDR, timing, and transient simulations.

Collaboration with schematic, layout, and mechanical teams to review PCB design constraints and ensure SI/PI/EMC compliance with locomotive and industrial standards

Preferred candidate profile
Crosstalk Analysis ( Near-Field and Far-Field )
Conducted analysis on Time Domain Reflectometry.
Knowledge in S Y Z parameter along with RL, IL, Crosstalk
Conduct DDR analysis in compliance with JEDED standards, including eye diagram and eye mask
Evaluations to assess SI and timing margins for high-speed memory interfaces Designed and
Generate Eye diagram masks for bus topology

📌 Si/pi Engineer Bengaluru (India)
🏢 Avalon Technologies
📍 India