Dft Engineer Bengaluru

Dft Engineer Bengaluru

22 Aug
|
Leading
|
Bengaluru

22 Aug

Leading

Bengaluru

o Working experience in SOC or Subsystems designs for multiple projects


o Robust understanding of DFT methodologies and experience in standard DFT tools.


• Familiarity with SoC style DFT architectures including multi -clock domain and low power


design practices.


• Knowledge of DFT including Scan, MBIST


• Knowledge of low power design methodology (static/energetic clock gating, power gating,


energetic voltage and frequency scaling)


• Good experience Top -level clock/reset circuit design


• Knowledge on DFT simulations and debugging.


• Hands On experience in ATPG/SCAN/MBIST/JTAG implementation at chip & block level.


• Knowledge on Test mode timing constraint development and analysis is a plus.


• Understanding of test compression and ATE debug is a plus


📌 Dft Engineer Bengaluru
🏢 Leading
📍 Bengaluru

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