Job Title: Memory Design Engineer /n Experience Required: 2+ Years /n Location: Bangalore /n Job Type: Full-time /n Industry: Semiconductors / VLSI / Memory IP /n Job Summary: /n We are seeking a skilled Memory Design Engineer to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and low-power memory blocks (e.g., SRAM, ROM, Register Files) for use in SoCs and ASICs across leading-edge process technologies. /n Key Responsibilities: /n /n
- Design custom memory circuits such as SRAM, ROM, CAM, Register Files, or eFuse.
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- Work closely with layout, verification, and technology teams to ensure optimal performance, power, and area (PPA).
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- Perform transistor-level circuit design, simulation, and optimization for speed, power, and robustness.
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- Analyze and simulate key circuits: sense amplifiers, bitline pre-charge, wordline drivers, decoders, write drivers, etc.
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- Run simulations across PVT corners using tools like HSPICE, Spectre, or XA.
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- Collaborate with layout teams for floorplanning and to ensure DRC/LVS clean layouts.
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- Perform post-layout simulations and analysis (IR drop, EM, aging).
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- Participate in memory characterization,
yield improvement, and silicon bring-up support.
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- Contribute to memory compiler development (if applicable).
/n /n Required Skills and Experience: /n /n
- B.E/B.Tech or M.E/M.Tech in Electronics, Electrical Engineering, or VLSI.
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- 2+ years of experience in full custom memory design.
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- Strong background in analog/mixed-signal CMOS circuit design.
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- Proficiency in simulation tools: HSPICE, Spectre, FastSPICE, XA.
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- Experience with design in advanced nodes (e.g., 28nm, 16nm, 7nm, 5nm, FinFET).
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- Familiarity with ESD, IR drop, EM, and reliability analysis techniques.
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- Understanding of process variation and Monte Carlo simulations.
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- Valuable debugging, problem-solving, and documentation skills.
/n /n Preferred Qualifications: /n /n
- Experience with memory compiler architecture/design.
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- Knowledge of radiation-hardened memory (RHBD) or safety-compliant memory (ISO 26262).
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- Scripting knowledge (e.g., Python, Perl, Tcl) for automation.
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- Exposure to silicon bring-up and correlation to simulation results.
/n /n /n /n Interested can share Cv to
[email protected]
📌 Memory Design Engineers (Bengaluru)
🏢 ACL Digital
📍 Bengaluru