Role: DFT Engineer/Lead

Experience: 4 to 18 Years

Locations: Bangalore | Hyderabad | Pune | Ahmedabad

: We are seeking experienced DFT Engineers with strong expertise in Design-for-Test methodologies for complex ASIC/SoC designs. The ideal candidate should have hands-on experience in Scan, ATPG, MBIST, and DFT implementation flows.

Key Responsibilities:

- Scan Insertion and Validation
- MBIST/BIST Implementation and Verification
- ATPG Generation and Pattern Validation
- DFT Timing Analysis and Sign-off
- DFT Planning and Execution
- Collaboration with Design, Verification, and Physical Design teams
- Development of DFT solutions for advanced ASIC/SoC designs

Required Skills:

- Solid understanding of DFT fundamentals and ASIC design flow
- Hands-on experience with Scan, ATPG, MBIST, and DFT implementation
- Proficiency in Tcl, Perl, and Shell scripting
- Experience with industry-standard DFT EDA tools
- Exposure to advanced technology nodes (28nm/16nm/7nm preferred)
- Strong debugging and problem-solving skills

Qualification: B.E./B.Tech/M.E./M.Tech in Electronics, Electrical, Computer Engineering, VLSI, or related fields.

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