Lead Design Verification Engineer (Bengaluru)

Lead Design Verification Engineer (Bengaluru)

25 Aug
|
Leadsoc Technologies
|
Bengaluru

25 Aug

Leadsoc Technologies

Bengaluru

Lead Design Verification Engineer

Location: Bengaluru

Experience: 6–12 Years

Role Overview

We are looking for a strong Lead Design Verification Engineer with deep expertise in Ethernet protocol & compliance verification, SerDes/controller validation, and UVM environment development to drive verification of complex networking and high-speed interface IPs.

Key Responsibilities

- Own verification strategy, planning, execution, and signoff for Ethernet/SerDes/controller IPs.
- Develop scalable, reusable SystemVerilog/UVM verification environments.
- Drive Ethernet protocol and compliance verification across functional, corner-case, and error scenarios.
- Perform SerDes and Ethernet controller validation, including link training, data integrity, error handling, and interoperability.
- Develop UVM agents, sequences, scoreboards, monitors, assertions, coverage models, and protocol checkers.
- Drive constrained-random, coverage-driven, assertion-based, and regression verification.
- Debug complex RTL/protocol issues using simulation, waveform, and regression analysis.
- Collaborate with RTL, architecture, firmware, PHY,



and system teams to achieve verification closure.

Required Skills

- 6–12 years of hands-on Design Verification experience.
- Strong SystemVerilog, UVM, SVA, and verification methodology expertise.
- Hands-on experience in Ethernet protocol & compliance verification.
- Robust experience in SerDes/controller validation and high-speed interface verification.
- Proven expertise in UVM environment development and reusable verification infrastructure.
- Strong understanding of Ethernet MAC/PCS/PHY, link protocols, packet processing, and error handling.
- Experience with functional/coverage closure and complex protocol debug.
- Strong scripting skills in Python/Perl/Tcl are preferred.

Good to Have

- Experience with 10G/25G/50G/100G/200G/400G Ethernet.
- Exposure to Ethernet VIP, compliance testing, SerDes PHY, PCIe/CXL, or high-speed interconnects.
- Experience leading verification teams/projects and driving end-to-end verification signoff.

📌 Lead Design Verification Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: lead design verification engineer (bengaluru) / bengaluru