Company Profile
Our client is a leading global provider of technology driven talent and Tech solutions, delivering technology-driven staffing, business services and managed workforce diverse industries. The organization specializes in helping enterprises build agile, scalable, and future-ready solutions through AI-enabled talent acquisition, workforce management, and digital HR solutions. With a strong international presence, it supports organizations in optimizing workforce productivity, improving operational efficiency, and accelerating business growth.
The organization serves diverse sectors including BFSI, Retail, Telecommunications, Manufacturing, Information Technology, Global Capability Centres (GCCs), Healthcare, and other key industries, helping clients accelerate growth, improve operational efficiency, and drive business transformation.

Job Profile: Full-Chip Physical Verification Lead
Location: Chennai, Bangalore
Work Mode: Work from office (WFO)
Preferred experience: 8+ years

The Role:




We are looking for experienced Full-Chip Physical Verification Leads with strong hands-on experience in Physical Verification, PV signoff, DRC, LVS, ERC, Antenna and complex subsystem/full-chip PV closure. The ideal candidate should have solid knowledge of Physical Design and PNR flow, along with hands-on experience using PNR tools for route fixes and PV closure. Flip-chip experience is mandatory for this role.

Responsibilities:
• Own and drive full-chip Physical Verification (PV) activities and signoff.
• Handle complex subsystem PV closure where full-chip experience is not available.
• Perform and debug DRC, LVS, ERC and Antenna violations.
• Drive PV violation analysis, debugging and closure within project timelines.
• Work closely with Physical Design, PNR, DFT, RTL, circuit and other cross-functional teams.
• Understand the PNR / Place & Route flow and identify physical implementation issues impacting PV.
• Use PNR tools for route fixes and support physical design

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