Fpga/asic Rtl Engineer Bengaluru (India)

Fpga/asic Rtl Engineer Bengaluru (India)

25 Aug
|
Omniglobe International
|
India

25 Aug

Omniglobe International

India

We're hiring an FPGA Design Engineer with 04 years of experience! This position is open to M.Tech freshers (with mandatory internship) and B.Tech graduates from 2022 or earlier with relevant FPGA Design experience.

Eligibility Criteria (Mandatory):

M.Tech candidates with mandatory internship experience in FPGA Design / FPGA Prototyping / Digital Design.

B.Tech graduates from 2022 or earlier batches with relevant FPGA Design experience.

OR

Candidates with 15 years of relevant industry experience in FPGA Design / FPGA Prototyping. B.Tech degree must be from 2022 or earlier batches.

Required Skills:

Solid hands-on experience in Verilog / SystemVerilog

Experience with Xilinx FPGAs and Xilinx Vivado

Robust RTL coding, synthesis, timing analysis, and debugging skills

Experience with FPGA implementation, constraints, and timing closure

Hands-on experience with industry-standard protocols such as AXI, AXI4-Lite, AXI-Stream, PCIe, DDR/DDR4, Ethernet, UART, SPI, or I2C

📌 Fpga/asic Rtl Engineer Bengaluru (India)
🏢 Omniglobe International
📍 India

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