Position:

Senior Engineer (Level 1)

:

Qualifications
7+ years of related technical engineering experience • 5+ years of experience applying digital design principles in SoC and/or IP development.
Proficient in Verilog/System Verilog coding constructs.
Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting) • Experience with high speed PCIe designs and protocols.
Experience with Industry standard interface protocols such as AXI, APB, etc.
Experience with ARM Fabric IPs.
Experience with IPXACT.
Understanding of Computer Architecture fundamentals.
Ability to write scripts using Python, Tcl, Perl etc.
Experience in EDA tools such as VCS, VCLP, Spyglass Lint, Questa CDC, Fusion Compiler, Design Compiler, Genus.
Proficiency with UPF (Low power intent) • Proficiency in clock crossing techniques.
Knowledge of Static Timing Analysis and understanding of timing signoff fundamentals.

Education

Bachelor’s / Masters

Location:

IN-KA-Bangalore, India

Time Type:

Full time

Job Category:

Engineering Services

📌 Senior Engineer Level 1 Bengaluru (India)
🏢 Arrow Ec
📍 India