As a member of the UMC Verification team, you are part of a dedicated team whose work has enabled AMD to put multiple Serve and Client SoCs to market in any given year. The UMC is part of every new AMD product being developed across Client, Server, Graphics and Semi-Custom markets. We are seeking an engineer to join the UMC team to help verify our growing product portfolio. In this role, you will analyze the scope of formal verification tasks, do formal sign-off for multiple block and set priorities for the work.
The Person:
We are seeking a formal verification engineer with strong analytical skills that thrives in a quick-paced environment. A team player with a global mindset and ability to work in a multi site environment are keys to being successful in this role.
Key Responsibilities:
- Work with design team to create FV test plan.
- Build formal verification environment, write assertions, covers and appropriate constraints.
- Create a common formal verification flow so properties and assertions can be ported to different hierarchies.
- Provide Training and mentor new team members.
Preferred Experience:
- Experience with 3+ Years of complex CPU/ASIC projects, with demonstrated mastery of successful verification from test planning till tapeout
- Hands on experience in writing SV assertions.
- Exposure to formal methodologies and industry standard Formal tool (like VC Formal, Jasper..).
- Knowledge of scripting using Perl, tcl or equivalent.
- Cache coherency or industry standard AMBA protocol knowledge is a plus
Academic Credentials:
Degree in Electrical Engineering, Computer architecture, or Computer Science with a focus on computer architecture is preferred.
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in computer engineering/Electrical Engineering
Disclaimer : This job posting has been aggregated from external source. Role detailscontentand availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.