Job Details:
- The Memory PHY Group (MPG) within the Central Engineering Group (CEG) is looking for an energetic and passionate Logic Design Engineer who will work on high-speed digital design targeted towards low power optimized IP implementations for the cutting-edge DDRPHY IPs.
- You will be responsible for overseeing definition, design, verification and your responsibilities will include but are not limited to - defining architecture and microarchitecture features of the block being designed, implementing RTL in System Verilog, setting up Automation flows for IP Logic Design, ensuring RTL quality via Front End tools for Lint, CDC, RDC, Voltage domain crossings, Synthesis QA checks etc, creating FE packages for IP milestones that meet SoC Collateral requirements, create creative automated solutions to help Logic Design in areas like Coverage closure, timing convergence etc.

Objectives of the position
- Own and deliver the logic design of Mixed Signal IPs.
- Continuously drive improvement in the Turnaround time,



robustness of Logic design via Architecture engagement and Tools/Methodology improvements.
- Drive area/power of IPs and come up with improvements on IP Area/Power metrics.
- Critical Decision making on Technical issues.

Qualifications:
Minimum Qualifications
- Proficiency in RTL design and coding using System Verilog and Verilog.
- Expertise in mixed signal fundamentals, low-power design using UPF, and clock gating.
- Deep understanding of digital and analog design principles, clock domain crossing, and power-performance tradeoffs.
- Experience with hardware simulation tools and methodologies (VCS/Verdi).
- Familiarity with IP environment and configuration management tools.
- Experience with Front End design tools for Lint, CDC, RDC, Voltage Domain Crossings, Synthesis, Low power design.

Preferred Qualifications
- Demonstrated ability to debug complex logic designs, speed paths and validate system-level functionality.
- Ability to collaborate across

📌 Mixed Signal Logic Design Engineer (Bengaluru)
🏢 Intel
📍 Bengaluru