Design Verification Engineer – IP / SoC / Subsystem
Experience:
5–18 Years
Location:
Bangalore
Notice period
: 0-60 Days
Job Description:
- Strong experience in
Design Verification
at IP, SoC, or Subsystem level.
- Hands-on experience with
High-Speed Protocols
such as PCIe, USB, Ethernet, CXL, or similar.
- Strong knowledge of
ARM Architecture
, including
ARM Cortex
processor-based designs.
- Expertise in
SystemVerilog & UVM
and verification methodology.
- Experience in developing
testbenches, test plans, assertions, functional coverage, and regression environments
.
- Good understanding of
SoC architecture, IP integration, and subsystem-level verification
.
- Debugging skills with simulation/emulation and protocol-level issues.
- Experience with
protocol compliance, performance validation, and corner-case testing
is preferred.
- Robust scripting knowledge in
Python/Perl/TCL
is an added advantage.
Interested candidates can connect at
[email protected]
📌 Design Verification Engineer – IP (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru