- Bachelor's/Master's degree in Electronics & Communication Engineering, Electrical Engineering, or related field.
- 3-5 years of experience in AMS Verification.
- Strong understanding of Analog Mixed-Signal design and verification concepts.
- Hands-on experience with:
- SystemVerilog
- UVM
- Verilog-AMS / Verilog-A
- Mixed-signal verification methodologies
- Strong debugging and problem-solving skills.
- Experience in scripting using Python, Perl, Shell, or TCL.
- Valuable understanding of assertions, coverage concepts, and regression management.
Preferred Skills
- Experience in verifying high-speed interfaces, ADC/DACs, PLLs, SerDes, PMICs, or Sensor IPs.
- Familiarity with real-number modeling (RNM).
- Knowledge of AMS verification acceleration techniques.
- Experience with SoC-level integration and verification.
- Understanding of low-power verification concepts.