29 Aug
|
Schaeffler
|
Bengaluru
29 Aug
Schaeffler
Bengaluru
Schaeffler is a dynamic global technology company and its success has been a result of its entrepreneurial spirit and long history of private ownership. Does that sound interesting to you? As a partner to all of the major automobile manufacturers, as well as key players in the aerospace and industrial sectors, we offer you many development opportunities.
General Information
This role focuses on ASIC digital design verification with emphasis on functional verification, early design verification, pre-silicon verification, functional safety verification, and post-silicon validation support. The engineer will verify legacy and new RTL designs in VHDL/Verilog using VHDL, SystemVerilog, and UVM (Universal Verification Methodology) - based testbenches, while ensuring design quality, requirement coverage, and robust silicon readiness.
Your Key Responsibilities
Develop and maintain verification environments for legacy/recent RTL designs using VHDL, Verilog, SystemVerilog, and UVM methodologies.
Prepare verification plans, test plans, testbenches, checkers, monitors, scoreboards, assertions,
and reusable verification components.
Perform functional, early design, and pre-silicon verification using directed, random, and constrained-random tests; debug failures through logs, waveforms, coverage, and RTL analysis.
Verify functional safety requirements including error detection/correction, OV/UV/OC detection, safe-state transition, fault handling, failure notification, and diagnostics.
Execute regressions, analyze functional/code/assertion coverage, drive verification closure, and document verification strategy, results, assumptions, and limitations.
Support post-silicon validation by debugging digital-side issues, reproducing silicon observations in simulation, and supporting root-cause closure.
Maintain verification collateral in GIT/SVN and track requirements, tasks, defects, and verification status using Polarion and Jira.
Your Qualifications
Bachelor’s/Master’s Degree in E
📌 ASIC Digital Design Verification Engineer (Bengaluru)
🏢 Schaeffler
📍 Bengaluru