We are looking for an experienced TPU Verification Engineer (Design Verification) to join our team in Bangalore.
? Experience: 5+ Years
? Location: Bangalore
? Role: TPU Verification Engineer (DV)
? Key Responsibilities
- Verify TPU-based subsystems/IPs
- Develop and execute detailed verification plans
- Create and maintain SystemVerilog/UVM testbenches
- Debug functional and protocol-related verification failures
- Perform register model verification and RAL-based verification
- Ensure protocol compliance and verification closure
- Work with design and verification teams to identify and resolve issues
?️ Must-Have Skills
- Strong experience in SystemVerilog (SV)
- Hands-on experience with UVM
- Positive understanding of AXI and APB protocols
- Experience with RAL Flow / Register Abstraction Layer
- Register Model Verification
- Experience with UART, SPI, and I2C
- Good understanding of IP/Sub-system verification
⭐ Good to Have
- Experience with ARM Peripheral IPs
- Exposure to TPU-based architectures/subsystems
- Strong debugging and problem-solving skills
Interested candidates can DM me or share their updated profile.