About the Role onsemi is seeking a DFT Engineer to support the design and implementation of Design‑for‑Test (DFT) features for complex ASIC/SoC products across automotive and industrial applications. This role focuses on scan, ATPG, MBIST, and boundary scan, with close collaboration across design, PD, and test teams.

Key Responsibilities

- Develop and integrate DFT architectures including Scan, ATPG, MBIST, and JTAG
- Implement and debug DFT logic to ensure high fault coverage and test quality
- Generate and analyze ATPG patterns using industry‑standard tools
- Support at‑speed and transition fault testing
- Collaborate with RTL, Physical Design, STA, and Test Engineering teams
- Address timing, CDC, and low‑power DFT considerations
- Support test coverage analysis, DFT signoff, and silicon bring‑up

- onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future.



With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world. More details about our company advantages can be found here:

https://www.onsemi.com/careers/career-benefits

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

📌 Senior DFT Engineer (Bengaluru)
🏢 Onsemi
📍 Bengaluru