Company Description AIonSi is a semiconductor solutions startup providing VLSI design and verification, automotive functional safety, and artificial intelligence services to clients worldwide. Led by seven industry experts, the company specializes in delivering end-to-end solutions for complex SoC designs, taking full ownership from concept to implementation. AIonSi operates as a one-stop platform, committed to best-in-class services with a strong emphasis on quality.

The team offers comprehensive expertise across IP and SoC design, integration, verification, gate-level simulation (GLS), and physical design, creating opportunities to work on cutting-edge semiconductor projects.

Role Description In this full time, on-site Design Verification Engineer role based in Hyderabad, the candidate will be responsible for planning, developing, and executing verification testbenches and methodologies for complex IP and SoC designs. Day-to-day activities include writing test plans, creating and reviewing verification environments, running simulations, analyzing coverage metrics, and ensuring thorough functional verification of RTL blocks and system-level features. The role involves close collaboration with RTL design, architecture, and physical design teams to clarify specifications, debug issues, and drive root-cause analysis for functional and performance problems.

The engineer will document verification results,



contribute to continuous improvement of verification flows, and support formal verification and regression strategies to maintain high-quality deliverables for global semiconductor clients.

Qualifications

- Candidates should possess strong skills in Functional Verification and Debugging, including testbench development, simulation-based verification, coverage analysis, and root-cause issue resolution.
- Candidates should possess solid expertise in RTL Design and Computer Architecture, with the ability to interpret specifications, understand micro-architectural features, and collaborate effectively with design teams.
- Candidates should possess relevant skills in Formal Verification, including working with formal tools and methodologies to complement simulation-based verification and improve design robustness.
- A bachelor’s or master’s degree in Electrical Engineering, Electronics, Computer Engineering, or a related field is preferred.
- Experience with industry-standard verification languages and tools (such as SystemVerilog/UVM, simulators, and formal verification tools) is highly beneficial.
- Strong analytical thinking, attention to detail, and the ability to work collaboratively in cross-functional engineering teams are expected.
- Prior experience in IP or SoC verification, especially in complex, high-performance designs, is an advantage.

📌 Design Verification Engineer (Hyderabad)
🏢 AIonSi
📍 Hyderabad