Silicon Engineering / 4-10 Years

Lead/ManagerDesign VerificationEngineer

Role: Lead/ManagerDesign VerificationEngineer
Exp:10+ Years
Location: Bangalore / Ahmedabad / Pune / Chennai

Minimum Qualifications:

- 10+ years of Design verification experience.
- Strong understanding of design concepts and ASIC flow
- Prior work experience on IP, Subsystem and Socverification.
- Strong SV/UVM coding skills.
- Strong understanding of RAL
- Hands-on experience on third party VIP Integration.
- Solid solving , analytical and debugging skills.
- Strong understanding of AMBA protocols like generic AXI, APB, AHB
- Hands on verification experience in Low speed peripherals like, I2C, SPI, QSPI, DMA, Interrupt controller, GPIO, UART
- Hands on verification experience in any of the high-speed protocol like PCIE, CXL, Ethernet or USB
- Hands on experience in any of the memory protocols like DDR, LPDDR or HBM
- Hand on experience withverificationtools such as VCS, Xcelium, Waveform analyzer and third-party VIP integration.
- Hands on experience with revision control flow like Git, SVN, Perforce
- Hands on experience withGLS and Power aware simulation (UPF)
- Experience in a team lead role, including guiding and mentoring team members, and ensuring effective collaboration and communication within the team.



As a Senior verification engineer candidate will be responsible to work at IP, Subsystem or SoC verification related tasks.

Responsibilities:

- Develop testbench components (Driver, Monitor, Scoreboard) from scratch or enhance an existing testbench for a given IP, Subsystem, or SOC.
- Understand design specifications and implementation to define the verification strategy.
- Create testbench micro-architecture, test plan, and coverage plan documents.
- Define the verification scope, develop test plans and tests, and establish the verification infrastructure to ensure design correctness.
- Implement SystemVerilog assertions and functional coverage.
- Analyze code coverage and address missing scenarios to meet coverage goals.
- Work with otherverificationteam members to develop, execute, and analyzeverificationtest cases and sequences, providing relevant solutions to issues.
- Collaborate with architects, designers, and pre- and post-siliconverificationteams to meet deadlines.
- Coordinate with customer leads, ensuring all deliverables and timelines are met.
- Serve as the projects point of contact, responsible forverificationsignoff.

To apply please send resumes to HR Manager, 2025 Gateway Place, Suite 435, San Jose, CA 95110 or email:

Location - Bengaluru,Ahmedabad,Pune,Chennai

📌 Lead/Manager Design Verification Engineer (Pune)
🏢 Eximietas Design
📍 Pune