Responsible for Design and development of critical analog, mixed-signal, custom digital blockand full chip level integration support.
Perform layout verification like LVS/DRC/Antenna, quality check and documentation.
Responsible for on-time delivery of block-level layouts with acceptable quality.
Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project setting.
Guide junior team-members in their execution of Sub block-level layouts & review their work
Contribute to effective project-management.
(Ref:www.freshersworld.com,freshersworld)
📌 Engineer (Delhi)
🏢 A Client of Teamlease
📍 Delhi
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