? MOSCHIP IS HIRING
Design Verification Lead / Manager
? Location: Hyderabad
? Employment Type: Full-Time
? Experience: 10–18 Years
⚡ Immediate Joiners Preferred
Key Skills & Experience:
? Solid expertise in SystemVerilog and UVM
? Solid experience in Subsystem and SoC-Level Verification
? Strong experience with PCIe, DDR5, HBM3, and UCIe
? Expertise in Verification Planning, Testbench Development, Constrained-Random Verification, Functional Coverage, and Coverage Closure
? Strong debugging and root-cause analysis skills
? Experience in leading and mentoring Design Verification teams
? Strong understanding of Digital Design and Computer Architecture
Key Responsibilities:
✔ Lead Design Verification activities for complex Subsystem and SoC-level designs
✔ Define and drive verification strategies and verification plans
✔ Develop and review UVM-based verification environments
✔ Drive simulation, debugging, coverage closure, and verification sign-off
✔ Collaborate with Design, Architecture, DFT, Firmware, and Validation teams
✔ Mentor engineers and ensure timely delivery of project milestones

📌 Senior Lead DV/DV Manager-Hyderabad-VLSI
🏢 MosChip®
📍 Hyderabad