30 Aug
|
Kandou AI
|
Industrial Area
30 Aug
Kandou AI
Industrial Area
Location: Greater Bengaluru Area (Hybrid)/ Greater Hyderabad
we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.
Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-productive. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.
our architecture is not just an incremental improvement — it’s a foundational shift in how AI hardware is built for the future.
. Location: Hyderabad/Bangalore
Senior Principal Digital Design Engineer — PCIe/CXL
About Kandou AI
Kandou AI is powering the future of AI infrastructure, operating at the intersection of information theory and semiconductor design. Kandou pioneered Copper MIMO (Chord Signaling) technology,
transforming crosstalk and noise inherent in copper links into a mechanism that unlocks higher bandwidth, lower power, and greater scale for GPU, memory, network, and rack-scale connectivity. The company's product portfolio includes the Matterhorn USB4 Retimer, Regli PCIe Retimer, Zetti PCIe Switch, and Glasswing Chiplet Interconnect IP, and it is building next-generation AI systems spanning AI inference, CXL memory platforms, and ultra-high-speed scale-up/scale-out networking.
Headquartered in Lausanne, Switzerland, Kandou AI has a global engineering footprint including design centers in the United States, United Kingdom, Germany, Taiwan, and a newly established India Chip Design Headquarters in Hyderabad, reflecting continued investment in world-class semiconductor design talent. Kandou fosters a hybrid, flexible working culture built around autonomy, teamwork, and a shared commitment to pushing the boundaries of connectivity t
📌 Senior Principal Digital Design Engineer — Pcie/Cxl (Industrial Area)
🏢 Kandou AI
📍 Industrial Area