- Work on advanced technology nodes (TSMC 2nm, 3nm, 5nm, 7nm, GF, etc.)
- Execute floor planning, device matching, routing, and parasitic extraction
- Ensure high-quality layout through DRC, LVS, ERC, ANT, EM/IR, and reliability checks
- Collaborate closely with design and verification teams to meet performance, area, and schedule requirements
- Support integration, debugging, and sign-off of analog/mixed-signal blocks