Analog Layout Engineer – Higher Node | Hyderabad

Experience: 3–6 Years

Location: Hyderabad

Role: Analog Layout Engineer

Notice Period: Immediate- 30 Days

Key Responsibilities

- Develop analog and mixed-signal layouts for higher-node technologies.
- Perform floorplanning, placement, routing and custom layout of analog blocks.
- Implement layout techniques such as matching, symmetry, common-centroid, shielding and guard rings.
- Execute DRC, LVS, ERC and PEX and resolve layout violations.
- Work closely with Analog Design, Verification and Physical Design teams.
- Optimize layouts for area, performance, parasitics and reliability.
- Support design reviews, debugging and tape-out activities.

Required Skills

- 3–6 years of hands-on experience in Analog/Mixed-Signal Layout.




- Experience with higher-node technologies such as 180nm, 130nm, 90nm, 65nm, 55nm, 40nm and similar nodes.
- Strong understanding of MOS, resistors, capacitors, current mirrors and differential-pair layouts.
- Hands-on experience with Cadence Virtuoso / Custom Layout tools.
- Good knowledge of DRC, LVS, ERC and PEX.
- Solid understanding of analog layout fundamentals and matching techniques.

Good to Have

- Experience in PLL, ADC/DAC, SerDes, PMIC, Memory or other analog IPs.
- Exposure to full-chip/block-level layout and tape-out.
- Good communication and cross-functional collaboration skills.

📌 Analog Layout Engineer – Higher Node | Hyderabad (Karnataka)
🏢 Leadsoc Technologies
📍 Karnataka