IP Design Verification Director (Bengaluru)

IP Design Verification Director (Bengaluru)

31 Aug
|
Mulya Technologies
|
Bengaluru

31 Aug

Mulya Technologies

Bengaluru

IP Design Verification Director
Top30 Semiconductor Organization in the world
Bangalore

Overview
We are seeking a seasoned Director of Design Verification with 20+ years of experience to lead verification for a flagship product in our portfolio. This is a hands-on leadership role where you will define the verification strategy, oversee execution, and ensure first-pass silicon success for complex SoC designs in server, storage, and networking domains.
Key Responsibilities
- Own and drive the end-to-end verification methodology for a specific product line.Lead, mentor, and grow a team of engineers, fostering technical excellence and innovation.
- Guide verification of industry-standard protocols such as PCIe and CXL across Physical, Link, and Transaction layers.
- Champion advanced methodologies (UVM, formal verification, AI-augmented flows) to accelerate coverage closure and improve efficiency.
- Collaborate closely with RTL design, architecture, and software teams to debug, refine, and optimize verification processes.
- Represent verification in executive reviews,



customer engagements, and industry forums.
- Shape workforce transformation by building hybrid skill sets and preparing the team for AI-driven verification challenges of the 2030s.
- Qualificatons
- Bachelor’s degree in Electrical or Computer Engineering (Master’s prefer
- red).
- 20+ years of experience in design verification, with a proven track record of leading teams and delivering complex SoC/silicon products.
- Deep expertise in PCIe/CXL protocols (Gen3 and above) and experience with third-party VerificationIPs.
- Robust background in UVM-based test plan development, assertions, coverage analysis, and abstraction layer design.
- Demonstrated ability to manage priorities, engage with stakeholders, and drive organizational success.
- Required Experience
- Hands-on expertise with Verification IPs for PCIe/CXL (Gen3 and above).
- Deep experience in UVM-based test plan development, sequence generation, a

📌 IP Design Verification Director (Bengaluru)
🏢 Mulya Technologies
📍 Bengaluru

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