Experience Level : 8+ Years We are looking for an experienced PD Lead / Principal Member of Technical Staff (PMTS) to join our Smart SoC Physical Design organization and lead the implementation, hardening, and technology migration of advanced PHY and High-Speed IP solutions. The Role As a technical leader, you will drive the physical implementation and hardening of critical IPs including: ✅ LPDDR4 / LPDDR5 / LPDDR6 PHYs ✅ DDR PHYs ✅ PCIe (GenX) ✅ Mixed-Signal PHYs ✅ UMC and High-Speed Interface Subsystems You will collaborate closely with Architecture, Circuit Design, RTL, SoC Integration, Packaging, SI/PI, CAD, and Technology teams to deliver best-in-class Power, Performance, Area (PPA) and product quality across advanced process technologies and foundries.