30 Aug
|
leadsoc technologies
|
Bengaluru
30 Aug
leadsoc technologies
Bengaluru
Senior Design Verification Engineer – AES-XTS / MACsec
Location: Bengaluru
Experience: 6–12 Years
Role Overview
We are looking for a strong Design Verification Engineer with hands-on expertise in AES-XTS, MACsec, encryption subsystems, SoC integration, and UVM setting bring-up to drive verification of security-focused IPs and complex SoC designs.
Key Responsibilities
Own verification of AES-XTS and MACsec functionality across IP and SoC environments.
Develop and bring up scalable SystemVerilog/UVM verification settings.
Verify encryption/decryption datapaths, key management, packet security, authentication, and error handling.
Develop UVM agents, sequences, scoreboards, monitors, assertions, reference models, and functional coverage.
Drive constrained-random, directed, assertion-based, and coverage-driven verification.
Validate encryption subsystem integration with SoC interconnects, DMA, memory, security controllers, and surrounding IPs.
Debug complex RTL, protocol, security, and integration issues through simulation and waveform analysis.
Drive regression, coverage closure,
and verification signoff in collaboration with RTL, architecture, firmware, and security teams.
Required Skills
6–12 years of hands-on Design Verification experience.
Strong SystemVerilog, UVM, SVA, and testbench development expertise.
Hands-on experience with AES/AES-XTS and/or MACsec verification.
Robust understanding of cryptographic datapaths, encryption/decryption, authentication, keys, and secure packet processing.
Experience with UVM environment bring-up and SoC/subsystem integration verification.
Strong debugging, coverage closure, and verification methodology skills.
Valuable scripting experience in Python/Perl/Tcl.
Valuable to Have
Experience with IEEE 802.1AE MACsec, AES-128/256, AES-GCM, or security accelerators.
Exposure to Ethernet MAC/PHY, networking SoCs, PCIe/CXL, or high-speed interconnects.
Experience with security IP/VIP, formal verification, or hardware security validation.
📌 Senior Design Verification Engineer Bengaluru
🏢 leadsoc technologies
📍 Bengaluru