About the Role: The SI/PI Engineer will be responsible for analyzing, designing, and validating high‑speed digital signal and power delivery networks to ensure robust system performance. The role focuses on maintaining signal quality, minimizing noise, controlling impedance, and ensuring reliable power distribution across complex electronic systems.Responsibilities:Signal Integrity (SI)Perform SI analysis for high‑speed interfaces such as DDR, PCIe, Ethernet, SERDES, LVDS, USB, HDMI, and similar protocolsAnalyze and optimize signal quality parameters including jitter, eye diagram, crosstalk, reflections, and skewDefine routing constraints, impedance control, termination schemes, and stack‑up recommendationsReview PCB layouts and provide SI‑driven design feedback to layout teamsPower Integrity (PI)Design and analyze Power Delivery Networks (PDN) for low noise and secure voltage deliveryPerform decoupling capacitor selection, placement, and optimizationAnalyze power plane impedance, IR drop, and transient responseSupport switching regulator and point‑of‑load (POL)



power architecture considerationsSimulation & AnalysisRun pre‑layout and post‑layout SI/PI simulationsPerform What‑if analysis to assess design trade‑offsCorrelate simulation results with lab measurementsValidation & DebugSupport lab validation using high‑speed measurement toolsAnalyze and debug SI/PI issues during board bring‑upDrive root cause analysis for signal and power related failuresDocumentation & CollaborationCreate SI/PI guidelines, design checklists, and reportsWork closely with schematic designers, PCB layout engineers, FPGA/SoC teams, and system engineersParticipate in design reviews and ensure compliance with signal/power integrity best practicesQualifications:Education: Master’s degree in Electronics Engineering, Electrical Engineering, Microelectronics or a related disciplineExperience: 2-4 years of experience in SI/PI engineering for high‑speed digital systemsHands‑on experience: with PCB‑level SI/PI analysis and validationRequired Skills:Technical Skills: Expertise in:Transmission line theoryEye diagram analysisCrosstalkEMI/EMC fundamentalsHigh‑speed timing and jitter analysisStrong understanding of: PDN design, Decoupling strategies, Target impedance methodology, DC drop and transient current analysisTools (Any of the following): SI/PI simulation tools: Ansys SIwave / HFSS, Cadence Sigrity, Keysight ADS, PCB design tool familiarity: Cadence Allegro / Altium, Lab equipment: High‑bandwidth oscilloscopes, TDR/TDT, Network analyzersPreferred Skills:Desirable : Knowledge of EMC/EMI compliance and mitigation

📌 Signal Integrity Engineer (Nagpur)
🏢 Solar Industries India
📍 Nagpur