Job Title: FPGA RTL Design Engineer

Location: Bengaluru, India

Experience: 4+ Years

Role Overview:

We are seeking a skilled FPGA RTL Design Engineer with 4+ years of experience in FPGA development and digital design. The candidate will be responsible for RTL design, implementation, verification, and FPGA bring-up for high-performance SoC/FPGA-based solutions.

Key Responsibilities:

- Design and develop RTL using Verilog/SystemVerilog/VHDL for FPGA-based applications.
- Perform FPGA synthesis, place & route, timing closure, and performance optimization.
- Develop and execute functional verification plans, testbenches, and debugging activities.
- Collaborate with hardware, firmware, and system teams for integration and validation.
- Analyze and resolve design, timing, and FPGA implementation issues.
- Support board bring-up,



lab validation, and customer issue resolution.

Required Skills:

- 4+ years of experience in FPGA RTL design and verification .
- Strong proficiency in Verilog/SystemVerilog and digital design fundamentals.
- Experience with FPGA tools such as Xilinx Vivado , Intel Quartus , or equivalent.
- Positive understanding of timing analysis, CDC, reset synchronization, and FPGA architectures .
- Experience with simulation and debugging tools (ModelSim, Questa, VCS, etc.).
- Familiarity with interfaces such as PCIe, Ethernet, DDR, AXI, SPI, I2C, or UART .
- Strong problem-solving and debugging skills.

📌 FPGA RTL Design Engineer (Bengaluru)
🏢 UST
📍 Bengaluru