Job Title: Analog Layout Engineer (BCD Technology)

Location: Europe (Italy and Austria) Experience: 5–15 Years

Job Summary

We are looking for an experienced Analog Layout Engineer to join our semiconductor design team in Europe. The ideal candidate will have strong expertise in BCD (Bipolar-CMOS-DMOS) technology and hands-on experience in the physical layout of Power Management ICs (PMICs), specifically DC-DC Converters and Buck Converters. The candidate should possess a deep understanding of analog layout techniques, matching requirements, parasitic optimization, and high-voltage design considerations.

Key Responsibilities

- Design and implement high-quality analog and mixed-signal layouts for Power Management ICs. - Develop layouts for BCD technology-based designs, including high-voltage and power devices. - Perform layout implementation for DC-DC Converters, Buck Converters, LDOs, charge pumps, and other analog power blocks. - Ensure layouts meet performance, reliability, and manufacturability requirements. - Execute device matching, shielding, guard rings, symmetry, common-centroid placement, and parasitic optimization techniques. - Collaborate closely with Analog Design, Verification, DRC/LVS, and CAD teams throughout the design cycle. - Resolve DRC, LVS, ERC, and antenna violations while maintaining layout quality.



- Support post-layout simulations and parasitic extraction analysis. - Drive layout optimization for area, performance, and yield. - Participate in design reviews and provide technical guidance to junior engineers where required.

Required Skills & Qualifications

- Bachelor's or Master's degree in Electronics, Electrical Engineering, Microelectronics, or a related discipline. - 5–15 years of experience in Analog Layout Design. - Strong hands-on experience with BCD (Bipolar-CMOS-DMOS) process technology. - Proven experience in DC-DC Converter and Buck Converter layout implementation. - Solid understanding of analog layout methodologies, including: - Device matching - Common-centroid layout - Interdigitated structures - Guard rings - Symmetry - Shielding - Latch-up prevention - ESD-aware layout practices - Experience with industry-standard EDA tools such as Cadence Virtuoso, Calibre, or equivalent. - Good knowledge of DRC, LVS, ERC, PEX, and reliability checks. - Familiarity with high-voltage devices and power management IC design is highly preferred. - Solid debugging, analytical, and problem-solving skills. - Excellent communication skills and the ability to work effectively in a multicultural global team.

📌 Senior Analog Layout Engineer for Europe Location (Mumbai)
🏢 Mirafra Technologies
📍 Mumbai