FPGA Design Engineer

We are seeking an

RTL FPGA Engineer

with a strong background in FPGA design, RTL development, and digital system design. The ideal candidate will have expertise in developing FPGA solutions using

VHDL

or

SystemVerilog , along with solid experience in hardware verification and debugging. This role will involve designing RTL for complex FPGA architectures, optimizing for performance and resource utilization, and ensuring robust verification and integration of your designs.

Key Responsibilities: RTL Design:

Design and implement high-quality RTL code for FPGA-based systems, primarily using

VHDL

or

SystemVerilog . System Design:

Work on complex digital system designs, including

signal processing ,

interface design , and integration of components such as

memory controllers ,

processors , or

peripheral devices . Verification:

Develop and execute verification plans, including testbenches, to validate your designs in simulation and on real hardware. Debugging:

Use hardware debugging tools (e.g.,

oscilloscopes ,

logic analyzers ) to troubleshoot and validate designs during both simulation and hardware implementation phases. Optimization:

Ensure that designs are optimized for FPGA performance, resource usage (LUTs, flip-flops, etc.), and power consumption. Collaboration:

Work closely with cross-functional teams including hardware engineers, firmware developers, and systems engineers to integrate and test complete FPGA solutions. Documentation:





Create and maintain detailed design documentation, including specifications, schematics, test cases, and verification reports. Support:

Assist with bringing up and debugging prototypes on FPGA hardware, as well as providing support for post-silicon validation and production systems.

Required Qualifications: Bachelor’s or Master’s degree

in

Electrical Engineering ,

Computer Engineering , or a related field. 4+ years of hands-on experience

in FPGA design and RTL development. Expertise in

HDL

design using

VHDL

or

SystemVerilog . Strong understanding of

digital logic design

and

FPGA architecture . Familiarity with

FPGA toolchains

like

Xilinx Vivado ,

Intel Quartus , or

Lattice Diamond . Experience with

FPGA verification

using simulation tools such as

ModelSim ,

VCS , or

Questa . Knowledge of

scripting languages

(e.g.,

TCL ,

Python ) for automation and tool integration. Experience with

hardware debugging

tools, including oscilloscopes, logic analyzers, and in-circuit emulators. Solid understanding of

timing analysis ,

clock domain crossing , and

resource optimization

techniques in FPGA design. Experience with

interfaces

such as

PCIe ,

Ethernet ,

USB , or

DDR

is a plus. Strong problem-solving skills and attention to detail. Ability to work independently and as part of a team-oriented team.

Location: Bengaluru / Hyderabad Experience: 4 to 8 Years

📌 FPGA Design Engineer (Mumbai)
🏢 ACL Digital
📍 Mumbai