Job Description
Hi,
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nPlease find the JD below:-
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n10+ years experience in Intel/Altera FPGAs (Agilex, Stratix‑10, Arria‑10) • Architecting FPGA systems with PCIe Gen4/Gen5 Hard IP • Expertise in Quartus Prime Pro, Platform Designer, timing closure, transceiver configuration • Experience with NVMe/PCIe protocols, DMA engines, and high‑speed digital design • Ownership of system architecture, FPGA design reviews, floorplanning, and integration • Guide team on RTL quality, CDC, SDC constraints, SignalTap debug, and performance optimization.
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nKindly note: Altera FPGA and PCIe Gen 3/4/5 experience is mandatory.
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nPlease do share your resume to
[email protected] or refer your friends or colleagues.
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nRegards,
nJaya
📌 Opening for FPGA Design (Bengaluru)
🏢 UST
📍 Bengaluru