Job Description

Role Responsibilities

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1. Design and develop analog and mixed-signal IC blocks such as bandgap references, LDOs, bias circuits, oscillators, amplifiers, comparators, ADC/DAC support circuits, current/voltage sensing circuits, level shifters, and high-voltage interface circuits
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2. Own the full design cycle from specification definition, architecture selection, transistor-level design, simulation, layout guidance, post-layout verification, silicon bring-up, characterization, and production support.
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3. Perform detailed simulations across PVT, mismatch, Monte Carlo, noise, stability, transient, startup, PSRR, CMRR, and reliability conditions.
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4. Work closely with layout engineers to guide floorplanning, matching, shielding, routing, parasitic-aware layout, ESD/latch-up considerations, and post-layout debug.
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5. Collaborate with digital, verification, applications, test, product, and systems teams to ensure the design meets product-level requirements.
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6. Analyze silicon measurement results, correlate silicon behavior with simulation, identify root causes, and drive design fixes when needed.
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7. Support design documentation, design reviews, FMEA, production test definition, and customer/debug activities as required.
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Required Qualifications

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1. BSEE/MSEE/PhD in Electrical Engineering or related field.
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2. 5+ years of hands-on analog or mixed-signal IC design experience.
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3. Strong fundamentals in CMOS analog design, device physics, feedback systems, noise, mismatch, stability, sampling circuits, and layout-dependent effects.
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4. Experience designing one or more of the following: precision references, regulators, amplifiers, ADC/DAC circuits, sensor interfaces,



oscillators, high-voltage analog circuits, or power management blocks.
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5. Strong experience with Cadence Virtuoso, Spectre, ADE, Monte Carlo analysis, corner simulations, and post-layout extraction flows.
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6. Ability to debug complex analog issues using simulation and silicon data.
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7. Good understanding of layout techniques for precision analog design, including matching, common-centroid layout, guard rings, isolation, shielding, and parasitic control.
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8. Ability to work independently, take ownership of blocks, and drive them to tapeout-quality completion.
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Preferred Qualifications

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- Experience with BCD, high-voltage CMOS, automotive, industrial, battery management, optical control, or precision sensing products.
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- Experience with sigma-delta ADCs, SAR ADCs, current sensing, temperature sensors, bandgaps, LDOs, charge pumps, or isolated/high-voltage interfaces.
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- Familiarity with reliability checks, ESD/latch-up constraints, EM/IR, antenna, DRC/LVS, and foundry design rules.
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- Experience with silicon bring-up, bench characterization, ATE correlation, and production yield improvement.
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- Knowledge of Verilog-A modeling, MATLAB/Python data analysis, or mixed-signal verification is a plus.
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Desired Attributes

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- Strong analytical and debugging mindset.
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- Practical, silicon-oriented design judgment.
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- Ability to balance performance, area, power, schedule, and risk.
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- Good communication skills and ability to work across global engineering teams.
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- Comfortable working in a fast-paced startup setting with high ownership and limited hand-holding.
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Send your CV to [email protected]

📌 Senior Analog Design Engineer (Bengaluru)
🏢 PI Semiconductor
📍 Bengaluru