Job Title: Senior Embedded Hardware Engineer

Location: Ahmedabad, Gujarat, India

Experience: 3-7 years

About the Company

PierSight Space is building the next generation of Synthetic Aperture Radar applications for persistent, all-weather surveillance. SAR enables day-and-night observation throughout the year, even when clouds, darkness, or difficult conditions limit conventional systems. PierSight develops application-specific systems instead of stretching one platform across every use case.

Its current offerings include Varuna, a SAR and AIS satellite constellation for maritime agencies and naval operators, and Vidura, a drone-mounted SAR payload designed for foliage-penetrating surveillance by on-ground defense operators. This focused approach is designed to deliver superior mission data at a fraction of the cost of broad, general-purpose alternatives. The company is building both payloads and satellite buses in-house, giving engineering teams direct ownership across critical parts of the space system.

PierSight's team has contributed to major missions and programs including NISAR, the NASA-ISRO Synthetic Aperture Radar Mission, Chandrayaan-2, Chandrayaan-3, and the RISAT series. The organization values knowledge sharing, resilience, critical thinking, integrity, leading by example, and seeing ownership through to measurable outcomes.

About the Role

As a Senior Embedded Hardware Engineer in the Earth Observation Satellite Payload Development Team, you will design, integrate, and validate complex embedded hardware for space-based payload applications. You will own mixed-signal electronics architectures spanning high-speed ADCs and DACs, FPGAs, processors, memory, RF paths, power management, and high-speed interfaces. The role requires defining and reviewing PCB constraints rather than performing detailed layout, ensuring complex multilayer boards meet electrical, thermal, manufacturing, and reliability requirements.

You will work across FPGA, embedded software, mechanical, RF, systems, and test functions to take designs from architecture and documentation through bring-up, characterization, qualification, and root-cause resolution. Success means delivering robust payload electronics that meet performance and environmental requirements for demanding space missions.

Key Responsibilities

- Own payload electronics architectures, block diagrams, schematics, component specifications, interface definitions, and design documentation, translating mission requirements into reviewable and verifiable hardware decisions.
- Design mixed-signal boards integrating high-speed ADCs, DACs, FPGAs, processors, memories, RF circuits, switching regulators, low-noise LDOs, monitoring, sequencing, and multiple power domains.
- Implement and validate JESD204B/C links between converters and FPGAs, including clocking, SYSREF, synchronization, lane configuration, deterministic latency, initialization, and link debugging.
- Define and approve layout constraints for more than 12-layer boards, covering SERDES above 10 Gbps, PCIe, DDR3/DDR4, LVDS, Ethernet, USB, RF traces, clocks, return paths, impedance, stubs, and domain isolation.
- Review signal-integrity, power-integrity, thermal, channel-loss, crosstalk, return-loss, eye-diagram, timing, and power-distribution-network analyses to prevent integration and qualification failures.
- Design and review RF paths, 50-ohm structures,



matching, filtering, shielding, grounding, and isolation from digital and switching-power circuits while protecting sensitive analog performance.
- Lead board bring-up, laboratory debugging, performance characterization, root-cause investigations, and optimization using oscilloscopes, spectrum analyzers, VNAs, logic and protocol analyzers, and power analyzers.
- Develop and execute validation plans supporting functional, interface, RF, power, EMI/EMC, thermal, vibration, qualification, and environmental testing against applicable space and military requirements.

Essential Skills & Technologies

- High-speed mixed-signal hardware design using ADCs, DACs, FPGAs, processors, memories, RF circuits, switching regulators, and low-noise power rails on complex multilayer boards exceeding 12 layers.
- Practical JESD204B/C implementation with high-speed converters and FPGAs, including lane and device configuration, clocking, SYSREF, synchronization, deterministic latency, initialization, and debugging.
- Strong board-level understanding of SERDES above 10 Gbps, PCI Express, DDR3/DDR4, high-speed LVDS, gigabit or multigigabit Ethernet, USB, differential routing, reference clocks, resets, connectors, and channel loss.
- Ability to define and review SI/PI constraints covering controlled impedance, length and phase matching, via structures, stubs, plane continuity, return currents, crosstalk, connector transitions, clocks, SYSREF, and power-distribution networks.
- Working knowledge of RF transmission lines, impedance matching, filtering, insertion and return loss, grounding, shielding, isolation, and component placement for mixed-signal hardware.
- Experience designing power architectures with buck converters, point-of-load regulators, LDOs, sequencing, monitoring, compensation, transient response, ripple and noise control, thermal management, and power-loop minimization.
- Proficiency with schematic capture and EDA tools, SI/PI simulation methods, S-parameters, eye and channel analysis, crosstalk, PDN impedance, PCB fabrication, assembly, stack-ups, controlled impedance, and manufacturing constraints.
- Hands-on laboratory debugging plus strong EMI/EMC knowledge, hardware bring-up, technical reporting, failure investigation, root-cause analysis, and cross-functional hardware-software integration.

Additional Plus

- Experience developing electronics for satellite payloads, aerospace, defense, or other high-reliability applications, with exposure to space-grade or radiation-tolerant components and relevant qualification practices.
- Familiarity with MIL-STD-883 or equivalent standards, environmental qualification, vibration, thermal-vacuum, EMI/EMC testing, radiation effects, derating, component screening, FMEA, and worst-case circuit analysis.
- Experience with high-speed converter clock trees, low-jitter generation, synchronization, phase-noise requirements, and advanced SI/PI simulations using S-parameters, eye diagrams, channel models, crosstalk,



and PDN analysis.

What You'll Bring

- You bring 3–7 years of professional experience in embedded hardware or complex electronic-board design, supported by a Bachelor's or Master's degree in Electronics, Electrical Engineering, Embedded Systems, or a related discipline.
- You can own architecture and detailed design while recognizing that success depends on disciplined interfaces between electronics, FPGA, software, RF, mechanical, systems, test, manufacturing, and mission assurance teams.
- You are comfortable reviewing detailed PCB layouts without being the primary layout designer, and can clearly define constraints for high-speed, RF, analog, power, clock, grounding, shielding, and manufacturing requirements.
- You use analysis and measurement to make decisions, combining simulation, calculations, protocol evidence, laboratory instrumentation, and structured test results rather than relying on assumptions.
- You can debug difficult board-level failures involving link initialization, signal integrity, power integrity, clocking, RF isolation, thermal behavior, EMI/EMC, and software-hardware interaction.
- You produce precise specifications, interface-control documents, design-analysis reports, test procedures, test results, and technical reports that allow teams to review, reproduce, and approve engineering outcomes.
- You demonstrate ownership, resilience, critical thinking, integrity, and a willingness to share knowledge while delivering reliable hardware against demanding space-program milestones.'

Why Join Us

At PierSight Space, your work will directly shape the electronics behind application-specific SAR systems designed for real surveillance needs. You will help build payload hardware for Earth observation rather than supporting only a narrow downstream function. The in-house development of payloads and satellite buses creates direct connection between your circuit decisions, subsystem performance, integration confidence, and mission readiness.

You will work alongside engineers with experience from NISAR, Chandrayaan-2, Chandrayaan-3, the RISAT series, and other demanding space programs. The role offers meaningful technical scope across mixed-signal architecture, JESD204B/C, SERDES, PCIe, RF, FPGA hardware, power integrity, validation, and environmental qualification. You will be expected to share knowledge, stay resilient, think critically, act with integrity, lead by example, and see ownership through.

If you want to solve difficult electronics problems and see your work contribute to robust, cost-effective surveillance systems, this is an prospect to build technology with visible mission impact.

What We Offer

- Work on in-house SAR payload and satellite-bus development where your hardware decisions influence system capability, integration confidence, and operational mission outcomes.
- Collaborate with experienced engineers who have contributed to major NASA-ISRO and Indian space missions, gaining exposure to demanding aerospace design and qualification practices.
- Join a mission-driven deep-technology team building cost-effective surveillance systems for maritime agencies, naval operators, and defense users.
- Receive competitive compensation and the opportunity to grow through meaningful ownership, technical collaboration, and complex end-to-end engineering challenges.

📌 Senior Embedded Hardware Engineer (Gujarat)
🏢 PierSight
📍 Gujarat