Job Description

Job Description – Senior FPGA Engineer (2–8 Years Experience)

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Location: Bengaluru, Karnataka

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Experience: 2–8 Years

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Employment Type: Full-Time

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Key Responsibilities

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- Design, develop, and implement FPGA-based solutions for RF, DRFM, and high-speed digital systems.
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- Develop RTL using Verilog/VHDL and perform FPGA verification.
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- Execute the complete FPGA development flow including:
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- RTL Design
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- IP Integration
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- Simulation
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- Synthesis
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- Place & Route
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- Timing Closure
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- Bitstream Generation
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- Hardware Bring-up and Debugging
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- Integrate and customize vendor IPs including DDR, Ethernet, PCIe, SPI, I2C, UART, PLL, and SerDes.
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- Perform FPGA simulation and debugging using QuestaSim/ModelSim or equivalent tools.
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- Collaborate with RF, Embedded, Hardware, and System Engineering teams during product development.
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- Support board bring-up,hardware validation, and system integration activities.
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- Develop and maintainFPGA design documentation and technical reports.
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- Participate in design reviews, technicaldiscussions, and architecture planning.
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- Optimize FPGA resource utilization, timing performance, and power consumption.
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Required Skills

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- B.E./B.Tech/M.Tech in Electronics, ECE, EEE, or a related discipline.




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- 3–5 years of hands-onFPGA development experience.
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- Robust experience with:
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- Xilinx Vivado
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- Intel Quartus Prime
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- Proficiency in Verilog and/or VHDL.
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- Strong understanding of FPGA implementation flow.
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- Experience with FPGA timing constraints and timing closure techniques.
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- Experience integrating vendor IPs and high-speed interfaces.
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- Knowledge of DDR, PCIe, Ethernet, SPI, I2C, UART, and high-speed serial communication.
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- Experience with board-level debuggingand hardware validation.
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- Good understanding of digital design principles and signal processingconcepts.
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Preferred Qualifications

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- Experience in Defence, Electronic Warfare (EW), DRFM, Radar, SDR, or Satcom systems.
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- Experience working on FPGA-basedsignal processing applications.
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- Familiarity with high-speedtransceivers and SerDes architectures.
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- Knowledge of TCL scriptingand FPGA design automation.
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- Experience working with DRDO Labs, Defence PSUs (BEL, HAL, BDL), ISRO, or Defence R&D; programs will be a strong advantage.
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Location

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Bengaluru, Karnataka Immediate Joiners Preferred

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